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sapiens
Joined: 27 Sep 2007
Posts: 4
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| Lock out of CAN reception |
 Posted: Tue Oct 02, 2007 5:04 am |
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I am using 18F458 Rev C0. The board communicates over CAN BUS. It is working very fine for a uncertain time, than it stops reception. I used ICD to debug the board. When this happens, I see that frame is accepted however, contents of the frame buffer does not reflect the frame that is sent. I searched errata for that. Certainly, silicon errata for rev C0 has this error:
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An incoming CAN message may not be saved properly to a CAN receive buffer if one of the following conditions is met:
1. Bank 15 is selected and the firmware attempts to read RXB0 or RXB1 registers while a CAN message reception is in progress.
2. Bank 15 is selected and an instruction is executed whose lower 8 bits match with one of the CAN receive buffer addresses (RXBn addresses in the range of 0xF61 to 0xF6E and 0xF51 to 0xF5D) while a CAN message reception is in progress. Some of the instruction examples are:
• 0xFF68 (NOP)
• 0xEE68 (first half of GOTO 0xD0)
• 0x0E6A (MOVLW 0x6A)
• 0x6055 (MOVF 0xF66, W)
Other instruction combinations exist.
3. The firmware attempts to access GPRs (General Purpose Register addresses) between addresses 0x51 and 0x5D in the Access Bank while a CAN message reception is in progress. Some of the instruction examples are:
• MOVWF 0x57, A
• ADDWF 0x57, A
• MOVF 0x57, W, A
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I found that CCS does what is described above. I fixed all by modifications in CAN driver. CAN driver was accessing CAN buffers independently, I modified it to use WIN, also GPR between 51..5D were located by compiler. I prevented it.
However, I still have a problem like what is described in errata.
Any ideas? |
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jma_1
Joined: 08 Feb 2005
Posts: 147
Location: Wisconsin
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| Posted: Tue Oct 02, 2007 11:31 am |
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Greetings sapiens,
Assuming your modifications have not introduced a new problem, perhaps there is another source for the issue. Try checking the CAN hardware to see if faults have been detected(TXERR; RXERR). As a work around, try re-initializing the CAN module (bad band-aid).
Do you have the watch dog timer implemented? Perhaps a code problem is causing the processor to get lost in the weeds.
Unfortunately I do not have an 18F458 available to test with.
Cheers,
JMA |
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sapiens
Joined: 27 Sep 2007
Posts: 4
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| Posted: Thu Oct 04, 2007 3:06 am |
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Hella JMA,
I multiply checked my modifications. I don't think it introduces a problem. The firmware has been checking warnings and errors.
I debugged the firmware. When those things start happenning, the CAN module says that frame received, but if you check the ingredens of frame buffer, it has the last frame content prior to the time the problem started. I figured out that CAN Bus double buffering does not work as it was intended. I say that because if MCU stays in some code a little longer than 2 frame period, RXB0 is filled by the incoming frame, and the second incoming frame is supposed to go into RXB1. If there is a third frame even before the buffers freed, it is supposed to set overlflow flag in RXB1.
However, it does not.. |
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edh329
Guest
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| Same Issue |
| Posted: Mon Jun 16, 2008 11:00 am |
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| Has this issue been resolved by anyone. I'm seeing the same issue |
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