i checked all this info. and that kind of protocol is what i have in mind.
my problem is how to know the instant when the byte in the spi port is available.
i can already send and receive bytes. but it's hard to receive what i am expecting. because there are other functions to be done meanwhile.
i am trying to implement such a protocol where the master pics starts the communication. slave answers informing if there is info to be send or not.
how to do this?
ckielstra
Joined: 18 Mar 2004 Posts: 3680 Location: The Netherlands
Posted: Mon May 01, 2006 3:35 am
Quote:
my problem is how to know the instant when the byte in the spi port is available.
The spi hardware can generate an interrupt signal when new data is ready to be read.
Quote:
i can already send and receive bytes. but it's hard to receive what i am expecting. because there are other functions to be done meanwhile.
This is a classical situation for which interrupts where designed for. You will have to write an interrupt routine that will become active on SPI data reception and then stores the received data in a large save buffer.
Your other functions can do their things but on data reception the interrupt will become active, read and store your data after which your normal program flow is continued again. At a later time, that you decide on, you can check for the large receive buffer to contain data and process it.
Depending on the data you are transmitting you can set up the receive buffer as a linear or ring buffer. The following thread is a discussion on when to use either buffer type: http://www.ccsinfo.com/forum/viewtopic.php?t=6446
An example of an interrupt based cyclic buffer is EX_SISR.C in the CCS example directory.
cjusto
Joined: 26 Apr 2006 Posts: 38 Location: Portugal
Posted: Mon May 01, 2006 2:33 pm
thanks ckielstra.
i will try that. implementing a save buffer should work.
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