Aquisition time ADC F877

[Orcino Borges]

Which frequency of acquisition in the example below ? pic used is 16f877-20 mhz.

Thanks in advance.

Orcino


while(1){

set_adc_channel(0);
canal_0=read_adc();

set_adc_channel(1);
canal_1=read_adc();

set_adc_channel(2);
canal_2=read_adc();

set_adc_channel(3);
canal_3=read_adc();

set_adc_channel(4);
canal_4=read_adc();

set_adc_channel(5);
canal_5=read_adc();


}
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This message was ported from CCS's old forum
Original Post ID: 10346

[rocco]

:=
:= Which frequency of acquisition in the example below ? pic used is 16f877-20 mhz.
:=
:= Thanks in advance.
:=
:= Orcino
:=
:=
:=while(1){
:=
:=set_adc_channel(0);
:=canal_0=read_adc();
:=
:=set_adc_channel(1);
:=canal_1=read_adc();
:=
:=set_adc_channel(2);
:=canal_2=read_adc();
:=
:=set_adc_channel(3);
:=canal_3=read_adc();
:=
:=set_adc_channel(4);
:=canal_4=read_adc();
:=
:=set_adc_channel(5);
:=canal_5=read_adc();
:=
:=
:=}

You'll probably need a 10-20 usec delay between the set_adc_channel() and the read_adc() [ check out page 115 of the manual on set_adc_channel and the Microchip Databook 16F87XA page 125].

Good Luck...

R
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This message was ported from CCS's old forum
Original Post ID: 10348

[R.J.Hamlett]

:=
:= Which frequency of acquisition in the example below ? pic used is 16f877-20 mhz.
:=
:= Thanks in advance.
:=
:= Orcino
:=
:=
:=while(1){
:=
:=set_adc_channel(0);
:=canal_0=read_adc();
:=
:=set_adc_channel(1);
:=canal_1=read_adc();
:=
:=set_adc_channel(2);
:=canal_2=read_adc();
:=
:=set_adc_channel(3);
:=canal_3=read_adc();
:=
:=set_adc_channel(4);
:=canal_4=read_adc();
:=
:=set_adc_channel(5);
:=canal_5=read_adc();
:=
:=
:=}
The first question, is what the source impedance is, of the analog signals?. The chip needs a small amount of time, between selecting a channel, and starting a read from that channel. This time varies according to the impedance of the driving source, but with a source that meets the maximum impedance specified for the chip, requires about 20uSec. However if your source has a lower impedance than this, you can reduce this time. Also if you are prepared to accept lower accuracy from the AD (throwing away the LSB's), you can also run with less time. With a source impedance of 2.5K, the time required drops to about 13uSec, for a 10bit AD.
So the sequence then has to read:

set_adc_channel(0);
delay_us(13);
canal_0=read_adc();

For each channel.

Now the 'set_adc_channel' instruction, used six instructions (1.2uSec). The delay then takes 13uSec. The read, has to trigger the conversion, and then to wait for the chip to perform this. The time for this, depends on the clock selected for the AD. The _minimum_ specified for TAD, is 1.6uSec. In your case, selecting the AD clock as '32Tosc', will give this time. The conversion then takes twelve times this interval (19.2uSec), with a small amount of latency beyond this (it may take a couple of instructions to 'see' the flag saying that the conversion is complete). The read then takes another 0.8uSec.
Hence the total time from starting to trigger the conversion, to retrieving the last byte will be 34.2 to 34.6uSec.
If you are prepared to accept a lower accuracy, you can reduce the settling time, set the converter to be 'left justified', and only read the MSB of the returned data. Doing this with a 1K source impedance, reduces the required sampling delay to 10uSec, and reduces the read time to 0.4uSec, taking the total time down to 30.8 to 31.2uSec (you would have to code the commands yourself to do this).

Best Wishes

Best Wishes
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This message was ported from CCS's old forum
Original Post ID: 10351