A/D on 16F876

[FRANCESC]

Hi all,
we try to use the PIC 16F876 to read 4 Analog sources connected on ports RA0,RA1,RA2,RA4 (Pins.2,3,4) .Only the four channels read correctly when are connected to Gnd.
Others configurations not represent the correct bit respect the voltage.
If we place that line SETUP_ADC_PORTS(ALL_ANALOG) not have any bit value
Help....How is possible to read correctly the four channels ???

#include <16f873.h>
#device ADC=10
#fuses xt,nowdt,put,nolvp
#use delay(clock=4000000)
LONG T,K1,K2,K3,K4;

Main()
{
while(1)
{
SETUP_ADC(ADC_CLOCK_DIV_8);
set_tris_a(0x27);
//SETUP_ADC_PORTS(ALL_ANALOG);

SET_ADC_CHANNEL(0);
T=READ_ADC();
delay_ms(1000);
K1=T/64;

SET_ADC_CHANNEL(1);
T=READ_ADC();
delay_ms(1000);
K2=T/64;

SET_ADC_CHANNEL(2);
T=READ_ADC();
delay_ms(1000);
K3=T/64;

SET_ADC_CHANNEL(4);
T=READ_ADC();
delay_ms(1000);
K4=T/64;

Display_bits();
}
}

Please Help

[KerryW]

You need a delay between setting the A/D channel and reading the A/D.

SET_ADC_CHANNEL(0);
delay_ms(10); // Delay before reading A/D
T=READ_ADC();
delay_ms(1000);
K1=T/64;

[itp]

You have put 10ms delay ??

I have similer problem.

Can anybody help me to setup ADC in my 16F876 uC running at 20Mhz

#include <16F876.h>
#device *=8 ADC=8 /* allow RAM addresses below 255 */

setup_adc_ports(ALL_ANALOG);
setup_adc(ADC_CLOCK_DIV_8);


Is it necessary to put delay?. If so what could be the minimum value.?
Kindly cheak settings given above.

Regards
Itp

[Ttelmah]

[neil]

I will add to Ttelmah's comments....

first, Frances, you have put the ADC setup lines inside your main loop (while(1)). This is not necessary and should be outside the loop, immediately after main(), so it is only executed once. Are there any other setup/config lines missing? What else is your pic doing?

Second. This is a big reason for your ADC not reading correctly. Ttelmah, mentioned this, but I will direct you to Table 11-1 in the datasheet. This shows that the maximum clock frequency for "ADC_DIV_8" can be 5MHz. For anything above this, you will need "ADC_DIV_32". This will cause incomplete reads and has caught me out in the past! Basically, you have to divide the clock frequency further for faster crystal speeds, because of the acquisition time of the ADC due to capacitance.

This should clear things up.
Neil.

[itp]

Hi Ttelmah and neil,

Thank you for your suggestions

Thanks and regards
Itp