What happens at the receive part when we write with SPI?

[rikotech8]

Hi, I know this is not a specific CCS question, but I did't know where else to ask, moreover I have an user account here.

So this is it:

When SPI master writes to the slave, something is shifting into the receive buffer right?
If yes, then it is normal "RXDATAAVAILABLE" flag to be set? It is nonsense! We send data, and when data is sent, we get notified that there is data received.

If all of my statements are correct, then how do we know what the correct data is into the RXFIFO?

Suppose we send two bytes frame. The first one is the address and the second one is dummy in order to read the value in that address (of the slave). Then suppose we have two levels Rx FIFO. In that FIFO instead the value read from the slave, we have two bytes, the first is GOD knows what, and the second the value read from the slave.

So the question is: how do we manage to receive only what is necessary, without getting all that crap during the write part of the frame?

I know my English sucks, yet I hope you get the Idea.
_________________
A person who never made a mistake never tried anything new.

[Ttelmah]

That is all down to the design of the transaction.

Normally the transaction from a master will always begin with a write. The data returned during this will be defined in the slave paperwork as one of three basic possibilities. 1) A particular fixed state (1 or 0). 2) "Don't care / high impedance" 3) In some cases slaves will clock back a status byte.

So (for instance), on the 25AA040, for a 'read', the master begins by writing the 'read' command, followed by the address to read from. Only once these are sent, does it then clock back the read byte. The data on the SPI I line for the first two transactions is defined as 'high impedance' (so garbage).

Yes the master will receive the garbage bytes for the first two transactions. It is up to the code to ignore these.

There is not a buffer full flag for a master device. When the master has finished a transaction, and sent a byte the SSPIF bit gets set. The buffer full bit is only valid in slave mode. If you look at a typical PIC data sheet:

[rikotech8]

This is exactly what I've asked for
Thank you @Ttelmah, excellent answer.
_________________
A person who never made a mistake never tried anything new.