View previous topic :: View next topic |
Author |
Message |
SeeCwriter
Joined: 18 Nov 2013 Posts: 160
|
Fuse question |
Posted: Wed Jan 27, 2016 11:24 am |
|
|
I'm using an 18F67K22. With the settings:
#Fuses PLLEN
#use delay(clock=64000000,internal=16000000,restart_wdt)
Why does the list file show fuse NOPLLEN?
I'm using v5.054 IDE. |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19499
|
|
Posted: Wed Jan 27, 2016 11:34 am |
|
|
It should be turning it on at the start of the code. If the timings say it isn't, use setup_oscillator to do this.
The reason is that several of the other similar PIC's (don't think this one actually does), have a errata that they can't actually wake up with the PLL enabled above certain clock rates. So to 'be safe' if you define the clock and crystal in the clock statement, the compiler defaults to enabling the PLL in software. It won't do this if you just use the PLLEN fuse, and specify clock=64MHz, rather than specifying both clock and srystal values. |
|
|
SeeCwriter
Joined: 18 Nov 2013 Posts: 160
|
|
Posted: Wed Jan 27, 2016 11:47 am |
|
|
Originally, I only had the delay statement with clock=64M, and no fuse statement. But when I noticed the fuse setting in the list file of NOPLLEN I added the fuse as well, but it had no effect.
So I need use the set_oscillator to enable the pll? |
|
|
Ttelmah
Joined: 11 Mar 2010 Posts: 19499
|
|
Posted: Wed Jan 27, 2016 12:05 pm |
|
|
Yes.
If you look at the data sheet, for the internal oscillator the PLL can _only be enabled in software_. The PLL fuse is ignored.
"For the INTIOx modes (HF-INTOSC):
• Only the PLLEN can enable the PLL (PLLCFG is
ignored).
• When the oscillator is configured for the internal
oscillator (FOSC<3:0> = 100x), the PLL can be
enabled only when the HF-INTOSC frequency is
8 or 16 MHz." |
|
|
|