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Setting Internal Vref for ADC

 
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Willson



Joined: 22 Jul 2014
Posts: 7
Location: Singapore

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Setting Internal Vref for ADC
PostPosted: Tue Dec 02, 2014 7:21 pm     Reply with quote

Hi

I would like to check with you guys on the following ADC.

When i write the following command, is the internal Vref set a default to VDD or do i require to configure it?
Code:

setup_adc_ports( AN0 );
setup_adc( ADC_CLOCK_INTERNAL );

while(1)
{
     set_adc_channel( 0 );        // RA0 is for Temperature Sensor
     delay_ms(10);
     temp_adc=read_adc();    // Store ADC reading for temperature
     ADC_calculate();              // compute ADC reading to temperature
     LCD_update();                  // display latest temperature reading

}

The reason i ask this is because i have error in my temperature reading.
I am very sure the calculation from ADC to temperature reading is correct but when i use the above command it error is about 5~10 degree error but when i use the external Vref+ and Vref- the error is like only 2 degree.

If i use external Vref+ and Vref- i require to use addition which it is use for other monitor.

Hope you guy are able to advise me.
_________________
Willson Toh
Ttelmah



Joined: 11 Mar 2010
Posts: 19497

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PostPosted: Wed Dec 03, 2014 1:34 am     Reply with quote

You can tell in one second yourself. We can't from what you show, since you don't tell us the processor.

Look at the include file for the processor. There will be a set of lines for the setup_adc_ports function for your chip, like:
Code:

// Optional Second parameter for SETUP_ADC_PORTS:
#define VSS_VDD      0x00000000       //| Range 0-Vdd
#define VSS_VREF     0x20000000       //| Range 0-VrefH
#define VSS_FVR      0x30000000       //| Range 0-Fvr


The default, will be the one that codes as zero. So in this case Vss to Vdd. 90+% of chips have this as the default.

Remember though just how much noise there will be on the processor supply pins. You need really good high frequency decoupling close to the processor, or little spikes on the supply _will_ cause erratic results.

In this case the chip has an internal Vref (you speak as if yours does), so this would require the VSS_FVR selection. There may also be a selection for this to choose it's range (some have programmable amplifiers giving *2 or *4 selectable). It's all dependant on your chip.
Ttelmah



Joined: 11 Mar 2010
Posts: 19497

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PostPosted: Wed Dec 03, 2014 5:28 am     Reply with quote

You accuracy when you are using a reasonable Vref won't be helped by your ADC clock. Internal, is on 99% of chips only recommended if the CPU clock rate is below 1MHz, or if you are putting the chip to sleep when you convert. Otherwise it increases the errors you will see....
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