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Failure on watchdog pic18f46k80
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mhz1575



Joined: 20 Jun 2008
Posts: 14

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PostPosted: Wed Jun 11, 2014 2:30 pm     Reply with quote

Hi,
answering to your questions:

1) real hardware board
2) board designed by myself, it's works fine on all functions I have two uarts, analog and digital input plus digital output. All works fine my sw is near to be closed.

3) compiler is 5.007 but for the schematics actually are reserved.

Just for your understanding now to come out from this undesired fault I have implemented watchdog using a timer. My sw periodically charge the timer, if the firmware is blocked somewhere the timer discharge and a reset cpu () is called. In this way works fine but I continue to understand why the wdt fault.
ezflyr



Joined: 25 Oct 2010
Posts: 1019
Location: Tewksbury, MA

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PostPosted: Wed Jun 11, 2014 2:43 pm     Reply with quote

Hi,

mhz1575 wrote:

compiler is 5.007


It would not surprise me one bit if this was actually your problem. You have a very early release of the v5 compiler, and it really should be considered 'pre-Beta' at that point..... It wouldn't be hard to look at the .lst file for your small test program and see if the proper steps are being taken to setup the WDT. A better solution, if you still have maintenance, would be to obtain the latest version of the compiler, and try that!

John
mhz1575



Joined: 20 Jun 2008
Posts: 14

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PostPosted: Wed Jun 11, 2014 3:05 pm     Reply with quote

Hi John This is .lst it's ok?
thank you

Code:

CCS PCH C Compiler, Version 5.007                11-giu-14 23.00

               Filename:   \\psf\Home\Documents\CCS\Test_wdt\Test_wdt.lst

               ROM used:   306 bytes (0%)
                           Largest free fragment is 65230
               RAM used:   5 (0%) at main() level
                           7 (0%) worst case
               Stack used: 0 locations
               Stack size: 31

*
00000:  GOTO   00B6
.................... #include <18F46K80.h>
.................... //////// Standard Header file for the PIC18F46K80 device ////////////////
.................... #device PIC18F46K80
00004:  DATA 0D,0A
00006:  DATA 52,65
00008:  DATA 73,74
0000A:  DATA 61,72
0000C:  DATA 74,65
0000E:  DATA 64,20
00010:  DATA 70,72
00012:  DATA 6F,63
00014:  DATA 65,73
00016:  DATA 73,6F
00018:  DATA 72,20
0001A:  DATA 62,65
0001C:  DATA 63,61
0001E:  DATA 75,73
00020:  DATA 65,20
00022:  DATA 6F,66
00024:  DATA 20,77
00026:  DATA 61,74
00028:  DATA 63,68
0002A:  DATA 64,6F
0002C:  DATA 67,20
0002E:  DATA 74,69
00030:  DATA 6D,65
00032:  DATA 6F,75
00034:  DATA 74,21
00036:  DATA 0D,0A
00038:  DATA 00,00
0003A:  DATA 0D,0A
0003C:  DATA 4E,6F
0003E:  DATA 72,6D
00040:  DATA 61,6C
00042:  DATA 20,70
00044:  DATA 6F,77
00046:  DATA 65,72
00048:  DATA 20,75
0004A:  DATA 70,21
0004C:  DATA 0D,0A
0004E:  DATA 00,00
00050:  DATA 48,69
00052:  DATA 74,20
00054:  DATA 61,6E
00056:  DATA 79,20
00058:  DATA 6B,65
0005A:  DATA 79,20
0005C:  DATA 74,6F
0005E:  DATA 20,61
00060:  DATA 76,6F
00062:  DATA 69,64
00064:  DATA 20,61
00066:  DATA 20,77
00068:  DATA 61,74
0006A:  DATA 63,68
0006C:  DATA 64,6F
0006E:  DATA 67,20
00070:  DATA 74,69
00072:  DATA 6D,65
00074:  DATA 6F,75
00076:  DATA 74,2E
00078:  DATA 0D,0A
0007A:  DATA 00,00
0007C:  TBLRD*+
0007E:  MOVF   FF5,F
00080:  BZ    009C
00082:  MOVFF  FF6,05
00086:  MOVFF  FF7,06
0008A:  MOVF   FF5,W
0008C:  BTFSS  F9E.4
0008E:  BRA    008C
00090:  MOVWF  FAD
00092:  MOVFF  05,FF6
00096:  MOVFF  06,FF7
0009A:  BRA    007C
0009C:  RETURN 0
.................... 
.................... #list
.................... 
.................... #device ADC=16
.................... 
.................... //#FUSES WDT                      //Watch Dog Timer
.................... #FUSES WDT512                  //Watch Dog Timer uses 1:512 Postscale
.................... #FUSES NOXINST                  //Extended set extension and Indexed Addressing mode disabled (Legacy mode)
.................... #FUSES NOBROWNOUT               //No brownout reset
.................... 
.................... #use delay(crystal=20000000)
.................... #use rs232(baud=115200,parity=N,xmit=PIN_C6,rcv=PIN_C7,bits=8,stream=GPS,errors)
0009E:  BTFSS  F9E.5
000A0:  BRA    009E
000A2:  MOVFF  FAB,04
000A6:  MOVFF  FAE,01
000AA:  BTFSS  04.1
000AC:  BRA    00B2
000AE:  BCF    FAB.4
000B0:  BSF    FAB.4
000B2:  GOTO   012E (RETURN)
.................... 
.................... void main()
000B6:  CLRF   FF8
000B8:  BCF    FD0.7
000BA:  CLRF   04
000BC:  BSF    FA7.3
000BE:  MOVLW  2A
000C0:  MOVWF  FAF
000C2:  MOVLW  00
000C4:  MOVWF  F7D
000C6:  MOVLW  A6
000C8:  MOVWF  FAC
000CA:  MOVLW  90
000CC:  MOVWF  FAB
000CE:  MOVLB  F
000D0:  MOVF   x5C,W
000D2:  ANDLW  80
000D4:  MOVWF  x5C
000D6:  MOVLW  00
000D8:  MOVWF  x5D
000DA:  BCF    FC1.3
000DC:  BCF    FC1.4
000DE:  BCF    FC1.5
000E0:  MOVLB  1
000E2:  CLRF   x88
000E4:  MOVLB  F
000E6:  CLRF   x5E
000E8:  CLRF   x5F
.................... {
....................    switch ( restart_cause() )
000EA:  MOVF   FD0,W
000EC:  ANDLW  0F
000EE:  BTFSS  FD0.4
000F0:  MOVLW  00
000F2:  BSF    FD0.0
000F4:  BSF    FD0.1
000F6:  BSF    FD0.4
000F8:  BSF    FD8.3
000FA:  BSF    FD8.4
000FC:  XORLW  07
000FE:  MOVLB  0
00100:  BZ    0108
00102:  XORLW  0B
00104:  BZ    0114
00106:  BRA    011E
....................    {
....................       case WDT_TIMEOUT:
....................       {
....................          fprintf(GPS,"\r\nRestarted processor because of watchdog timeout!\r\n");
00108:  MOVLW  04
0010A:  MOVWF  FF6
0010C:  MOVLW  00
0010E:  MOVWF  FF7
00110:  RCALL  007C
....................          break;
00112:  BRA    011E
....................       }
....................       case NORMAL_POWER_UP:
....................       {
....................          fprintf(GPS,"\r\nNormal power up!\r\n");
00114:  MOVLW  3A
00116:  MOVWF  FF6
00118:  MOVLW  00
0011A:  MOVWF  FF7
0011C:  RCALL  007C
....................          break;
....................       }
....................    }
.................... 
....................    setup_wdt(WDT_ON);
0011E:  BSF    FD1.0
.................... 
....................    while(TRUE)
....................    {
....................       //TODO: User Code
....................       restart_wdt();
00120:  CLRWDT
....................       printf("Hit any key to avoid a watchdog timeout.\r\n");
00122:  MOVLW  50
00124:  MOVWF  FF6
00126:  MOVLW  00
00128:  MOVWF  FF7
0012A:  RCALL  007C
....................       getc();
0012C:  BRA    009E
0012E:  BRA    0120
....................    }
.................... 
.................... }
00130:  SLEEP

Configuration Fuses:
   Word  1: C215   VREGSLEEP INTRC_HP SOSC_DIG NOXINST HSH NOPLLEN FCMEN IESO
   Word  2: 2778   PUT NOBROWNOUT BORV18 ZPBORM WDT WDT512
   Word  3: 8900   CANB MSSPMSK7 MCLR
   Word  4: 0091   STVREN BBSIZ2K NODEBUG
   Word  5: C00F   NOPROTECT NOCPB NOCPD
   Word  6: E00F   NOWRT NOWRTC NOWRTB NOWRTD
   Word  7: 400F   NOEBTR NOEBTRB
PCM programmer



Joined: 06 Sep 2003
Posts: 21708

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PostPosted: Wed Jun 11, 2014 3:15 pm     Reply with quote

I installed vs. 5.007 but it won't compile the file. It won't accept the
WDT and NOBROWNOUT fuses. I don't trust 5.007 at all. The file
compiled and ran OK with vs. 5.026.
mhz1575



Joined: 20 Jun 2008
Posts: 14

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PostPosted: Wed Jun 11, 2014 11:54 pm     Reply with quote

Ok tnx for your support.
mhz1575



Joined: 20 Jun 2008
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PostPosted: Fri Jun 13, 2014 1:49 am     Reply with quote

Hello Folks,
consider to use my actual compiler with "bugs" can I walk aroud this failure writing at low level the register for watchdog?
Reading the datasheet to enable the WDT I have to configure the 2H register in this way:
Config register 2H
Byte address 300003h
Value 01001111 (or 4F in hex)
This allow me to enable the wdt at 2seconds.

Now can I write that in the pic and how?
And can I also implement the assembler reset wdt with CLRWDT istruction instead of C code?

write_configuration_memory will be ok?

I'm apologize for this stupid questions but I'm more hardware than software..

Thank you
oxo



Joined: 13 Nov 2012
Posts: 219
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PostPosted: Fri Jun 13, 2014 2:06 am     Reply with quote

Use an earlier compiler. 4.141 was good

Or update your 5.007
Ttelmah



Joined: 11 Mar 2010
Posts: 19496

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PostPosted: Fri Jun 13, 2014 3:48 am     Reply with quote

If you change the watchdog postscaler, to 524288 it'll give you 4F in that byte. WDT524288

If you build with this, you get:
Code:

Configuration Fuses:
   Word  1: C215   VREGSLEEP INTRC_HP SOSC_DIG NOXINST HSH NOPLLEN FCMEN IESO
   Word  2: 4F78   PUT NOBROWNOUT BORV18 ZPBORM WDT WDT524288
   Word  3: 8900   CANB MSSPMSK7 MCLR
   Word  4: 0091   STVREN BBSIZ2K NODEBUG
   Word  5: C00F   NOPROTECT NOCPB NOCPD
   Word  6: E00F   NOWRT NOWRTC NOWRTB NOWRTD
   Word  7: 400F   NOEBTR NOEBTRB

Note the '4F' as the high byte of word2.

Says that in fact the compiler is doing what it is told. However the watchdog seems to be running 1000* faster than it should....

No, you don't want to use 'write_configuration_memory'. Every time you use this, you use a 'life' on your chips memory. If you add this to the code, you'd destroy it quite quickly. You could use:

#ROM 0x300003 = {0x4F78}
(you have to write the _word_, not byte), but just changing the fuses is easier.

The reset_wdt instruction just generates the clrwdt. Look at the lst you post:
Code:

....................       restart_wdt();
00124:  CLRWDT


The instruction already does what you want.

Have you tried with more than one chip?. There is no erratum on the watchdog for your chip, but it is behaving as if one of the watchdog fuses is not working as it should.
mhz1575



Joined: 20 Jun 2008
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PostPosted: Sat Jun 14, 2014 11:17 am     Reply with quote

Thank you to everybody for the suggestions, due to the fact that the time is less I have solved the issue using the rtcc timer plus reset_cpu instruction like a wdt. Works fine, in the future I'll upgrade the compiler.
Regards
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