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Kimowich
Joined: 16 May 2013 Posts: 2
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HELP - RFID tag And Manchester coding |
Posted: Thu May 16, 2013 1:52 pm |
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Hi
Using a PIC16f887 and PWC ver 4.084
I have an assignment where I have made a RFID tag sending a manchester encoded signal which i have connected to the analog comparator to get a clean digital signal.
Now the assignment says that i must separate the clock from the data somehow.
And I am completely lost.
I need some pointers in how you can do this. |
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Gabriel
Joined: 03 Aug 2009 Posts: 1067 Location: Panama
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Posted: Thu May 16, 2013 3:05 pm |
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manchester reads in the middle of the signal and not on edges...(transitions)
from what i understand you are the one generating the signal to decode... thus you know the exact signal timing...
you could wait for the initial edge and then trigger a read half a time constant later... and then the next read will be at a full time constant since the first read... efectively reading at the mid point of every bit....
... wikipedia has a nice manchester code article... with graphs..
G. _________________ CCS PCM 5.078 & CCS PCH 5.093
Last edited by Gabriel on Thu May 16, 2013 3:17 pm; edited 1 time in total |
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Gabriel
Joined: 03 Aug 2009 Posts: 1067 Location: Panama
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Posted: Thu May 16, 2013 3:07 pm |
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also, the clock cycle is 2 times the smallest bit duration.... _________________ CCS PCM 5.078 & CCS PCH 5.093 |
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FvM
Joined: 27 Aug 2008 Posts: 2337 Location: Germany
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Posted: Thu May 16, 2013 11:41 pm |
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If it's a passive RFID (e.g. ISO 14443A), the clock will be usually derived from the carrier.
But generally, it can be extracted from the received signal by a PLL. Depending on the bit rate, an "all-digital" PLL in software might work. |
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Kimowich
Joined: 16 May 2013 Posts: 2
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Posted: Fri May 17, 2013 3:42 am |
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i think my real problem is that i cant seem to figure out how to get those readings.
As far as i can see on my Scope, the clock is 2 Khz and if i want a middle read.
I know i can use the comparator interrupt to know when it shifts transition.
But how do i set the timer so that it will take the measurments correct?
and should i gate and sync my timer1 to the comparator? |
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asmboy
Joined: 20 Nov 2007 Posts: 2128 Location: albany ny
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Posted: Fri May 17, 2013 8:39 am |
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every NRZ clock recovery I have seen uses a frequency
locking PLL that is:
a) harmonic insensitive
b) locked to 2f of the "data0" bit rate ( data1 rate=2f of data0 )
the 74hc4046 chip is an excellent datasheet for you to read and study
unless you are set on doing this the hard way. |
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