We know that I2C doesn't have a reset. The issue is when using the hardware I2C with other hardware interrupts the I2C bus can get hung on rare occasions. When this happens the PIC watchdog resets the PIC but the external I2C ( Ex. DS1307) is a slave and expects the PIC to complete the transfer it started that the watchdog shut down before the I2C byte was fully transferred.
The following procedure is suggested and I'm hoping someone has tried it.
The procedure is as follows:
1) Master tries to assert a Logic 1 on the SDA line
2) Master still sees a Logic 0 and then generates a clock
pulse on SCL (1-0-1 transition)
3) Master examines SDA. If SDA = 0, go to Step 2; if
SDA = 1, go to Step 4
4) Generate a STOP condition
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