Arbitrary working Timer

[mehmetem]

Hi Everyody,

Timer2 is set as

[Ttelmah]

Post your setup_qei line, and clock rates/fuses, and what is connected to the QEI pins.
Also compiler version.
Is this 'for real', or with a debugger?. If so, what one?.
How are you generating the 'manual reset'?.

Obvious difference is initialisation states of the registers, depending on how you are generating the 'manual reset'.

Best Wishes

[mehmetem]

My setup qei;

setup_qei(QEI_MODE_X4|QEI_RESET_WHEN_IDX_PULSE,QEI_FILTER_DIV_1|QEI_IDX_WHEN_A0_B0,1439);

#FUSES NOWDT //No Watch Dog Timer
#FUSES NOWRTB //Boot block not write protected
#FUSES NOBSS //No boot segment
#FUSES PROTECTS //Standard Code protection
#FUSES NOWRT //Program memory not write protected
#FUSES PR_PLL //Primary Oscillator with PLL
#FUSES HS //High speed Osc (> 4mhz for PCM/PCH) (>10mhz for PCD)
#FUSES NOCKSFSM //Clock Switching is disabled, fail Safe clock monitor is disabled
#FUSES NOOSCIO //OSC2 is general purpose output
#FUSES WINDIS //Watch Dog Timer in non-Window mode
#FUSES WPRES128 //Watch Dog Timer PreScalar 1:128
#FUSES WPOSTS16 //Watch Dog Timer PostScalar 1:32768
#FUSES PUT128 //Power On Reset Timer value 128ms
#FUSES NOALTI2C //I2C mapped to alternate pins
#FUSES IESO //Internal External Switch Over mode enabled
#FUSES IOL1WAY //Allows only one reconfiguration of peripheral pins
#FUSES NODEBUG //No Debug mode for ICD
#FUSES NOCOE //Device will reset into operational mode
#FUSES NOJTAG //JTAG disabled
#FUSES ICS0 //ICD communication channel 0
#FUSES NOPWMPIN //PWM outputs drive active state upon Reset
#FUSES HPOL_HIGH //High-Side Transistors Polarity is Active-High (PWM 1,3,5 and 7)
#FUSES LPOL_HIGH //Low-Side Transistors Polarity is Active-High (PWM 0,2,4 and 6)

#use delay(clock=40000000)

My Oscillator config;
#word OSCCON = 0X0742 //OSCILLATOR CONTROL REGISTER
#word CLKDIV = 0X0744 //CLOCK DIVISOR REGISTER
#word PLLFBD = 0X0746//PLL FEEDBACK DIVISOR REGISTER
#bit CLKDIV0=CLKDIV.0//‘N1’, PLL prescaler ->N1=2
#bit CLKDIV1=CLKDIV.1
#bit CLKDIV2=CLKDIV.2
#bit CLKDIV3=CLKDIV.3
#bit CLKDIV4=CLKDIV.4
#bit CLKDIV6=CLKDIV.6//‘N2’, PLL prescaler ->N2=2
#bit CLKDIV7=CLKDIV.7
#bit CLKDIV11=CLKDIV.11//DOZE Mode Enable bit
#bit CLKDIV12=CLKDIV.12//Processor Clock Reduction Select bits->1:1
#bit CLKDIV13=CLKDIV.13
#bit CLKDIV14=CLKDIV.14
#bit CLKDIV15=CLKDIV.15

#bit OSCCON8=OSCCON.8
#bit OSCCON9=OSCCON.9
#bit OSCCON10=OSCCON.10


in main() function:
CLKDIV0=1;//‘N1’, PLL prescaler ->N1=5
CLKDIV1=1;
CLKDIV2=0;
CLKDIV3=0;
CLKDIV4=0;
CLKDIV6=0;//‘N2’, PLL prescaler ->N2=2
CLKDIV7=0;
CLKDIV11=0;//DOZE Mode Enable bit
CLKDIV12=0;//Processor Clock Reduction Select bits->1:1
CLKDIV13=0;
CLKDIV14=0;
CLKDIV15=0;

OSCCON8=1;//Primary oscillator (XT, HS, EC) with PLL
OSCCON9=1;
OSCCON10=0;

PLLFBD=0b000010011;//‘M’, PLL multiplier->M=20

//My crystal 40 Mhz, with PLL fosc=40MHz/5*20/2=80 MHz

My qei pins are connected a quadratura encoder as

#word RPINR14 = 0x069C //QEI remap reg
#word RPINR15 = 0x069E //QEI remap reg
#word QEI1CON = 0x01E0 //qei control register
#word DFLT1CON = 0x01E2 //qei dflt control register

in main(function)
RPINR14=0x1514; //qeb,qea remap
RPINR15=0x0013; //ind remap
QEI1CON=((QEI1CON&0xF8FB)|0x0604); //qei 4x mode, index pulse reset
DFLT1CON=((DFLT1CON&0xFEFF)|0x0100); // count error detect disabled

My compiler version is PCD V4.084, This is not a debugger, it is for real,

I'am generating manual reset with a push buton between MCLR and GND
By the way Quadrature Encoder is already running and its position can saw from LCD
I realized that conditional functions sometimes works partly

(I'm sorry for my broken English )

Thank you very much
_________________
trainee

[mehmetem]

I solved.