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Author |
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sandrini
Joined: 11 Oct 2007 Posts: 12
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MRF24J40 module |
Posted: Wed Dec 15, 2010 10:01 am |
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Dear Friends,
I'm trying to use the module mrf24j40 with CCS compiler and managed to find an example done in the compiler MikroC.
I made the adjustments of variable types for the CCS and even worked, but the receiver does some receptions and failed once or twice and then stops completely, just back to work when I press the reset button on the circuit.
When reprogram the microcontroller with code compiled by MikroC, the system works without any problem.
I've studied the source code of the microchip stack and see nothing wrong. Since also using code generated by C18, the system also works well.
Below is the source of the receiver ... Please, if you see anything wrong or where I am failing, please let me know.
Code: |
#include<18F4520.h>
#use delay (clock=8000000)
#fuses HS, NOWDT, NOPUT, BROWNOUT, BORV20, NOPBADEN, NOLVP
#use FAST_IO (C)
#use FAST_IO (B)
#byte SSPSTAT = 0XFC7
#byte SSPCON1 = 0xFC6
#include "registers.h"
#include "LCD_4B.c"
#define CS PIN_C0
#define RST PIN_C2
#define INTN PIN_B0
#define WAKE PIN_C1
#define SDI PIN_C5
#define SDO PIN_C4
#define CLK PIN_C3
char txt[4];
const unsigned int DATA_LENGHT = 3;
const unsigned int HEADER_LENGHT = 11;
int16 address_RX_FIFO = 0x300;
int16 address_TX_normal_FIFO = 0x000;
int data_RX_FIFO[1 + HEADER_LENGHT + DATA_LENGHT + 2 + 1 + 1];
int lost_data = 0;
int ADDRESS_short_1[] = {1,1}; // Source address
int ADDRESS_long_1[] = {1,1,1,1,1,1,1,1};
int ADDRESS_short_2[] = {2,2}; // Destination address
int ADDRESS_long_2[] = {2,2,2,2,2,2,2,2};
int PAN_ID_1[] = {3,3}; // Source PAN ID
int PAN_ID_2[] = {3,3}; // Destination PAN ID
int DATA_RX[DATA_LENGHT], DATA_TX[DATA_LENGHT], data_TX_normal_FIFO[DATA_LENGHT + HEADER_LENGHT + 2];
int LQI = 0, RSSI2 = 0, SEQ_NUMBER = 0x23;
int temp1;
boolean int_rb0 = false;
#INT_EXT
void trata_int()
{
//OUTPUT_HIGH(PIN_D1);
int_rb0 = 1;
}
/*
* Functions for reading and writing registers in short address memory space
*/
// write data in short address register
void write_ZIGBEE_short(int address, int data_r){
Output_Low(CS);
address = ((address << 1) & 0b01111111) | 0x01; // calculating addressing mode
SPI_Write(address); // addressing register
SPI_Write(data_r); // write data in register
Output_High(CS);
}
// read data from short address register
int read_ZIGBEE_short(int address)
{
int data_r = 0, dummy_data_r = 0;
Output_Low(CS);
address = (address << 1) & 0b01111110; // calculating addressing mode
SPI_Write(address); // addressing register
data_r = SPI_Read(dummy_data_r); // read data from register
Output_High(CS);
return data_r;
}
/*
* Functions for reading and writing registers in long address memory space
*/
// Write data in long address register
void write_ZIGBEE_long(int16 address, int data_r){
int address_high = 0, address_low = 0;
Output_Low(CS);
address_high = (((int)(address >> 3)) & 0b01111111) | 0x80; // calculating addressing mode
address_low = (((int)(address << 5)) & 0b11100000) | 0x10; // calculating addressing mode
SPI_Write(address_high); // addressing register
SPI_Write(address_low); // addressing register
SPI_Write(data_r); // write data in registerr
Output_High(CS);
}
// Read data from long address register
int read_ZIGBEE_long(int16 address){
int data_r = 0, dummy_data_r = 0;
int address_high = 0, address_low = 0;
Output_Low(CS);
address_high = ((int)(address >> 3) & 0b01111111) | 0x80; //calculating addressing mode
address_low = ((int)(address << 5) & 0b11100000); //calculating addressing mode
SPI_Write(address_high); // addressing register
SPI_Write(address_low); // addressing register
data_r = SPI_Read(dummy_data_r); // read data from register
Output_High(CS);
return data_r;
}
/*
* Reset functions
*/
// Reset from pin
void pin_reset(void)
{
Output_low(RST);
Delay_ms(5);
Output_High(RST);
Delay_ms(5);
}
void PWR_reset(void){
write_ZIGBEE_short(SOFTRST, 0x04); //0x04 mask for RSTPWR bit
}
void BB_reset(void){
write_ZIGBEE_short(SOFTRST, 0x02); //0x02 mask for RSTBB bit
}
void MAC_reset(void){
write_ZIGBEE_short(SOFTRST, 0x01); //0x01 mask for RSTMAC bit
}
void software_reset(void){ // PWR_reset,BB_reset and MAC_reset at once
write_ZIGBEE_short(SOFTRST, 0x07);
}
void RF_reset(void){
int temp = 0;
temp = read_ZIGBEE_short(RFCTL);
temp = temp | 0x04; //mask for RFRST bit
write_ZIGBEE_short(RFCTL, temp);
temp = temp & (!0x04); //mask for RFRST bit
write_ZIGBEE_short(RFCTL, temp);
Delay_ms(1);
}
/*
* Interrupt
*/
void enable_interrupt(void)
{
write_ZIGBEE_short(INTCON_M, 0x00); //0x00 all interrupts are enable
}
/*
* Set channel
*/
void set_channel(int channel_number){ // 11-26 possible channels
if((channel_number > 26) || (channel_number < 11)) channel_number = 11;
switch(channel_number){
case 11:
write_ZIGBEE_long(RFCON0, 0x02); //0x02 for 11. channel
break;
case 12:
write_ZIGBEE_long(RFCON0, 0x12); //0x12 for 12. channel
break;
case 13:
write_ZIGBEE_long(RFCON0, 0x22); //0x22 for 13. channel
break;
case 14:
write_ZIGBEE_long(RFCON0, 0x32); //0x32 for 14. channel
break;
case 15:
write_ZIGBEE_long(RFCON0, 0x42); //0x42 for 15. channel
break;
case 16:
write_ZIGBEE_long(RFCON0, 0x52); //0x52 for 16. channel
break;
case 17:
write_ZIGBEE_long(RFCON0, 0x62); //0x62 for 17. channel
break;
case 18:
write_ZIGBEE_long(RFCON0, 0x72); //0x72 for 18. channel
break;
case 19:
write_ZIGBEE_long(RFCON0, 0x82); //0x82 for 19. channel
break;
case 20:
write_ZIGBEE_long(RFCON0, 0x92); //0x92 for 20. channel
break;
case 21:
write_ZIGBEE_long(RFCON0, 0xA2); //0xA2 for 21. channel
break;
case 22:
write_ZIGBEE_long(RFCON0, 0xB2); //0xB2 for 22. channel
break;
case 23:
write_ZIGBEE_long(RFCON0, 0xC2); //0xC2 for 23. channel
break;
case 24:
write_ZIGBEE_long(RFCON0, 0xD2); //0xD2 for 24. channel
break;
case 25:
write_ZIGBEE_long(RFCON0, 0xE2); //0xE2 for 25. channel
break;
case 26:
write_ZIGBEE_long(RFCON0, 0xF2); //0xF2 for 26. channel
break;
}
RF_reset();
}
/*
* Set CCA mode
*/
void set_CCA_mode(int CCA_mode){
int temp = 0;
switch(CCA_mode){
case 1: //ENERGY ABOVE THRESHOLD
{
temp = read_ZIGBEE_short(BBREG2);
temp = temp | 0x80; //0x80 mask
temp = temp & 0xDF; //0xDF mask
write_ZIGBEE_short(BBREG2, temp);
write_ZIGBEE_short(CCAEDTH, 0x60); //Set CCA ED threshold to -69 dBm
}
break;
case 2: //CARRIER SENSE ONLY
{
temp = read_ZIGBEE_short(BBREG2);
temp = temp | 0x40; // 0x40 mask
temp = temp & 0x7F; // 0x7F mask
write_ZIGBEE_short(BBREG2, temp);
temp = read_ZIGBEE_short(BBREG2); // carrier sense threshold
temp = temp | 0x38;
temp = temp & 0xFB;
write_ZIGBEE_short(BBREG2, temp);
}
break;
case 3: //CARRIER SENSE AND ENERGY ABOVE THRESHOLD
{
temp = read_ZIGBEE_short(BBREG2);
temp = temp | 0xC0; //0xC0 mask
write_ZIGBEE_short(BBREG2, temp);
temp = read_ZIGBEE_short(BBREG2); // carrier sense threshold
temp = temp | 0x38; // 0x38 mask
temp = temp & 0xFB; // 0xFB mask
write_ZIGBEE_short(BBREG2, temp);
write_ZIGBEE_short(CCAEDTH, 0x60); //Set CCA ED threshold to -69 dBm
}
break;
}
}
/*
* Set RSSI mode
*/
void set_RSSI_mode(int RSSI_mode){ // 1 for RSSI1, 2 for RSSI2 mode
int temp = 0;
switch(RSSI_mode){
case 1:
{
temp = read_ZIGBEE_short(BBREG6);
temp = temp | 0x80; //0x80 mask for RSSI1 mode
write_ZIGBEE_short(BBREG6, temp);
}
break;
case 2:
write_ZIGBEE_short(BBREG6, 0x40); //0x40 data for RSSI2 mode
break;
}
}
/*
* Set type of device
*/
void nonbeacon_PAN_coordinator_device(void){
int temp = 0;
temp = read_ZIGBEE_short(RXMCR);
temp = temp | 0x08; // 0x08 mask for PAN coordinator
write_ZIGBEE_short(RXMCR, temp);
temp = read_ZIGBEE_short(TXMCR);
temp = temp & 0xDF; // 0xDF mask for CSMA-CA mode
write_ZIGBEE_short(TXMCR, temp);
write_ZIGBEE_short(ORDER, 0xFF); // BO, SO are 15
}
void nonbeacon_coordinator_device(void){
int temp = 0;
temp = read_ZIGBEE_short(RXMCR);
temp = temp | 0x04; // 0x04 mask for coordinator
write_ZIGBEE_short(RXMCR, temp);
temp = read_ZIGBEE_short(TXMCR);
temp = temp & 0xDF; // 0xDF mask for CSMA-CA mode
write_ZIGBEE_short(TXMCR, temp);
write_ZIGBEE_short(ORDER, 0xFF); // BO, SO are 15
}
void nonbeacon_device(void){
int temp = 0;
temp = read_ZIGBEE_short(RXMCR);
temp = temp & 0xF3; // 0xF3 mask for PAN coordinator and coordinator
write_ZIGBEE_short(RXMCR, temp);
temp = read_ZIGBEE_short(TXMCR);
temp = temp & 0xDF; // 0xDF mask for CSMA-CA mode
write_ZIGBEE_short(TXMCR, temp);
}
/*
* ACK request
*/
void set_ACK(void){
int temp = 0;
temp = read_ZIGBEE_short(TXNCON);
temp = temp | 0x04; //0x04 mask for set ACK
write_ZIGBEE_short(TXNCON, temp);
}
void set_not_ACK(void){
int temp = 0;
temp = read_ZIGBEE_short(TXNCON);
temp = temp & (!0x04); //0x04 mask for set not ACK
write_ZIGBEE_short(TXNCON, temp);
}
/*
* Encrypt
*/
void set_encrypt(void){
int temp = 0;
temp = read_ZIGBEE_short(TXNCON);
temp = temp | 0x02; // mask for set encrypt
write_ZIGBEE_short(TXNCON, temp);
}
void set_not_encrypt(void){
int temp = 0;
temp = read_ZIGBEE_short(TXNCON);
temp = temp & (!0x02); // mask for set not encrypt
write_ZIGBEE_short(TXNCON, temp);
}
/*
* Transmit packet
*/
void start_transmit(void){
int temp = 0;
temp = read_ZIGBEE_short(TXNCON);
temp = temp | 0x01; // mask for start transmit
write_ZIGBEE_short(TXNCON, temp);
}
/*
* Interframe spacing
*/
void set_IFS_recomended(void){
int temp = 0;
write_ZIGBEE_short(RXMCR, 0x93); // Min SIFS Period
temp = read_ZIGBEE_short(TXPEND);
temp = temp | 0x7C; // MinLIFSPeriod
write_ZIGBEE_short(TXPEND, temp);
temp = read_ZIGBEE_short(TXSTBL);
temp = temp | 0x90; // MinLIFSPeriod
write_ZIGBEE_short(TXSTBL, temp);
temp = read_ZIGBEE_short(TXTIME);
temp = temp | 0x31; // TurnaroundTime
write_ZIGBEE_short(TXTIME, temp);
}
void set_IFS_default(void){
int temp = 0;
write_ZIGBEE_short(RXMCR, 0x75); // Min SIFS Period
temp = read_ZIGBEE_short(TXPEND);
temp = temp | 0x84; // Min LIFS Period
write_ZIGBEE_short(TXPEND, temp);
temp = read_ZIGBEE_short(TXSTBL);
temp = temp | 0x50; // Min LIFS Period
write_ZIGBEE_short(TXSTBL, temp);
temp = read_ZIGBEE_short(TXTIME);
temp = temp | 0x41; // Turnaround Time
write_ZIGBEE_short(TXTIME, temp);
}
/*
* Reception mode
*/
void set_reception_mode(int r_mode){ // 1 normal, 2 error, 3 promiscuous mode
int temp = 0;
switch(r_mode)
{
case 1:
{
temp = read_ZIGBEE_short(RXMCR); // normal mode
temp = temp & (!0x03); // mask for normal mode
write_ZIGBEE_short(RXMCR, temp);
}
break;
case 2:
{
temp = read_ZIGBEE_short(RXMCR); // error mode
temp = temp & (!0x01); // mask for error mode
temp = temp | 0x02; // mask for error mode
write_ZIGBEE_short(RXMCR, temp);
}
break;
case 3:
{
temp = read_ZIGBEE_short(RXMCR); // promiscuous mode
temp = temp & (!0x02); // mask for promiscuous mode
temp = temp | 0x01; // mask for promiscuous mode
write_ZIGBEE_short(RXMCR, temp);
}
break;
}
}
/*
* Frame format filter
*/
void set_frame_format_filter(int fff_mode){ // 1 all frames, 2 command only, 3 data only, 4 beacon only
int temp = 0;
switch(fff_mode)
{
case 1:
{
temp = read_ZIGBEE_short(RXFLUSH); // all frames
temp = temp & (!0x0E); // mask for all frames
write_ZIGBEE_short(RXFLUSH, temp);
}
break;
case 2:
{
temp = read_ZIGBEE_short(RXFLUSH); // command only
temp = temp & (!0x06); // mask for command only
temp = temp | 0x08; // mask for command only
write_ZIGBEE_short(RXFLUSH, temp);
}
break;
case 3:
{
temp = read_ZIGBEE_short(RXFLUSH); // data only
temp = temp & (!0x0A); // mask for data only
temp = temp | 0x04; // mask for data only
write_ZIGBEE_short(RXFLUSH, temp);
}
break;
case 4:
{
temp = read_ZIGBEE_short(RXFLUSH); // beacon only
temp = temp & (!0x0C); // mask for beacon only
temp = temp | 0x02; // mask for beacon only
write_ZIGBEE_short(RXFLUSH, temp);
}
break;
}
}
/*
* Flush RX FIFO pointer
*/
void flush_RX_FIFO_pointer(void){
int temp;
temp = read_ZIGBEE_short(RXFLUSH);
temp = temp | 0x01; // mask for flush RX FIFO
write_ZIGBEE_short(RXFLUSH, temp);
}
/*
* FIFO
*/
void read_RX_FIFO(void){
unsigned int temp = 0;
int16 i = 0;
temp = read_ZIGBEE_short(BBREG1); // disable receiving packets off air.
temp = temp | 0x04; // mask for disable receiving packets
write_ZIGBEE_short(BBREG1, temp);
for(i=0; i<128; i++)
{
if(i < (1 + DATA_LENGHT + HEADER_LENGHT + 2 + 1 + 1))
data_RX_FIFO[i] = read_ZIGBEE_long(address_RX_FIFO + i); // reading valid data from RX FIFO
if(i >= (1 + DATA_LENGHT + HEADER_LENGHT + 2 + 1 + 1))
lost_data = read_ZIGBEE_long(address_RX_FIFO + i); // reading invalid data from RX FIFO
}
DATA_RX[0] = data_RX_FIFO[HEADER_LENGHT + 1]; // coping valid data
DATA_RX[1] = data_RX_FIFO[HEADER_LENGHT + 2]; // coping valid data
DATA_RX[2] = data_RX_FIFO[HEADER_LENGHT + 3]; // coping valid data
LQI = data_RX_FIFO[1 + HEADER_LENGHT + DATA_LENGHT + 2]; // coping valid data
RSSI2 = data_RX_FIFO[1 + HEADER_LENGHT + DATA_LENGHT + 3]; // coping valid data
temp = read_ZIGBEE_short(BBREG1); // enable receiving packets off air.
temp = temp & (!0x04); // mask for enable receiving
write_ZIGBEE_short(BBREG1, temp);
}
void write_TX_normal_FIFO(void){
int16 i = 0;
data_TX_normal_FIFO[0] = HEADER_LENGHT;
data_TX_normal_FIFO[1] = HEADER_LENGHT + DATA_LENGHT;
data_TX_normal_FIFO[2] = 0x01; // control frame
data_TX_normal_FIFO[3] = 0x88;
//data_TX_normal_FIFO[4] = SEQ_NUMBER; // sequence number
data_TX_normal_FIFO[5] = PAN_ID_2[1]; // destinatoin pan
data_TX_normal_FIFO[6] = PAN_ID_2[0];
data_TX_normal_FIFO[7] = ADDRESS_short_2[0]; // destination address
data_TX_normal_FIFO[8] = ADDRESS_short_2[1];
data_TX_normal_FIFO[9] = PAN_ID_1[0]; // source pan
data_TX_normal_FIFO[10] = PAN_ID_1[1];
data_TX_normal_FIFO[11] = ADDRESS_short_1[0]; // source address
data_TX_normal_FIFO[12] = ADDRESS_short_1[1];
data_TX_normal_FIFO[13] = DATA_TX[0]; // data
data_TX_normal_FIFO[14] = DATA_TX[1];
data_TX_normal_FIFO[15] = DATA_TX[2];
for(i = 0; i < (HEADER_LENGHT + DATA_LENGHT + 2); i++)
{
write_ZIGBEE_long(address_TX_normal_FIFO + i, data_TX_normal_FIFO[i]); // write frame into normal FIFO
}
set_not_ACK();
set_not_encrypt();
start_transmit();
}
/*
* Address
*/
void set_short_address(int * address){
write_ZIGBEE_short(SADRL, address[0]);
write_ZIGBEE_short(SADRH, address[1]);
}
void set_long_address(int * address){
int i = 0;
for(i = 0; i < 8; i++)
{
write_ZIGBEE_short(EADR0 + i, address[i]); // 0x05 address of EADR0
}
}
void set_PAN_ID(int * address){
write_ZIGBEE_short(PANIDL, address[0]);
write_ZIGBEE_short(PANIDH, address[1]);
}
/*
* Wake
*/
void set_wake_from_pin(void){
int temp = 0;
Output_Low(WAKE);
temp = read_ZIGBEE_short(RXFLUSH);
temp = temp | 0x60; // mask
write_ZIGBEE_short(RXFLUSH, temp);
temp = read_ZIGBEE_short(WAKECON);
temp = temp | 0x80;
write_ZIGBEE_short(WAKECON, temp);
}
void pin_wake(void){
Output_High(WAKE);
Delay_ms(5);
}
/*
* PLL
*/
void enable_PLL(void){
write_ZIGBEE_long(RFCON2, 0x80); // mask for PLL enable
}
void disable_PLL(void){
write_ZIGBEE_long(RFCON2, 0x00); // mask for PLL disable
}
/*
* Tx power
*/
void set_TX_power(unsigned int power){ // 0-31 possible variants
if((power < 0) || (power > 31)) power = 31;
power = 31 - power; //0 max, 31 min -> 31 max, 0 min
power = ((power & 0b00011111) << 3) & 0b11111000; // calculating power
write_ZIGBEE_long(RFCON3, power);
}
/*
* Init ZIGBEE module
*/
void init_ZIGBEE_basic(void){
write_ZIGBEE_short(PACON2, 0x98); // Initialize FIFOEN = 1 and TXONTS = 0x6
write_ZIGBEE_short(TXSTBL, 0x95); // Initialize RFSTBL = 0x9
write_ZIGBEE_long(RFCON1, 0x01); // Initialize VCOOPT = 0x01
enable_PLL(); // Enable PLL (PLLEN = 1)
write_ZIGBEE_long(RFCON6, 0x90); // Initialize TXFIL = 1 and 20MRECVR = 1
write_ZIGBEE_long(RFCON7, 0x80); // Initialize SLPCLKSEL = 0x2 (100 kHz Internal oscillator)
write_ZIGBEE_long(RFCON8, 0x10); // Initialize RFVCO = 1
write_ZIGBEE_long(SLPCON1, 0x21); // Initialize CLKOUTEN = 1 and SLPCLKDIV = 0x01
}
void init_ZIGBEE_nonbeacon(void){
init_ZIGBEE_basic();
set_CCA_mode(1); // Set CCA mode to ED and set threshold
set_RSSI_mode(2); // RSSI2 mode
enable_interrupt(); // Enables all interrupts
set_channel(11); // Channel 11
RF_reset();
delay_ms(1);
}
int verif_INT(void) {
int i = 0, j = 0, intn_d = 0;
for (i=0;i<5;i++)
{
intn_d = INPUT(INTN);
if (intn_d == 1) j++;
}
if (j>2) return 1;
else return 0;
}
/*
* Main
*/
void main(){
Set_TRIS_C(0x10);
Set_TRIS_B(0x01);
output_low(SDI);
output_low(CLK);
OUTPUT_low(CS);
OUTPUT_LOW(RST);
OUTPUT_LOW(WAKE);
temp1 = input(SDO);
Delay_ms(5);
// Initialize SPI module
//SETUP_SPI(SPI_MASTER | SPI_L_TO_H | SPI_XMIT_L_TO_H | SPI_CLK_DIV_64);
//SSPSTAT = 0xC0;
//SSPCON1 = 0x20;
SSPSTAT = 0x40;
SSPCON1 = 0x22;
//SETUP_SPI(SPI_MASTER | SPI_H_TO_L | SPI_SAMPLE_AT_END | SPI_CLK_DIV_64);
//OUTPUT_High(CS);
Write_ZIGBEE_long(RFCON8,0x10);
pin_reset(); // Activate reset from pin
software_reset(); // Activate software reset
RF_reset(); // RF reset
set_WAKE_from_pin(); // Set wake from pin
set_long_address(ADDRESS_long_2); // Set long address
set_short_address(ADDRESS_short_2); // Set short address
set_PAN_ID(PAN_ID_2); // Set PAN_ID
init_ZIGBEE_nonbeacon(); // Initialize ZigBee module
nonbeacon_PAN_coordinator_device();
set_TX_power(31); // Set max TX power
set_frame_format_filter(1); // 1 all frames, 3 data frame only
set_reception_mode(1); // 1 normal mode
pin_wake(); // Wake from pin
lcd_ini();
printf(lcd_escreve,"\fRecebendo...");
while(true){ // Infinite loop
if (verif_INT() == 0) {
temp1 = read_ZIGBEE_Short(INTSTAT);
read_RX_FIFO(); // Transmiting
printf(lcd_escreve,"\n%c%c %03u",DATA_RX[0], DATA_RX[1], DATA_RX[2]);
OUTPUT_TOGGLE(PIN_D0);
delay_ms(10);
}
}
} |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Wed Dec 15, 2010 7:59 pm |
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1. Post a link to the working source code for the other compiler.
2. Post your CCS compiler version. |
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sandrini
Joined: 11 Oct 2007 Posts: 12
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alexbibi
Joined: 12 Mar 2011 Posts: 3
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MRF24J40MB module |
Posted: Sat Mar 12, 2011 2:36 pm |
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Hello,
Is there any development regarding this post,
I would be extremely interested in having a driver for the MRF24J40
as well.
thx _________________ Alex |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Mon Mar 14, 2011 1:06 pm |
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I didn't translate the files in that link to CCS. I looked at the code and
it can be done. To do it, you need to understand the data types used in
MikroC and CCS. You also need to know about the #bit and #byte
statements in CCS. Then you can translate it to CCS as follows:
Code: |
// EasyBee3 connections
// sbit CS at RA0_bit; //CS pin
// sbit RST at RA1_bit; //RST pin
// sbit INT at RA2_bit; //INT pin
// sbit WAKE at RA3_bit; //WAKE pin
#byte PortA = getenv("SFR:PORTA")
#bit CS = PortA.0
#bit RST = PortA.1
#bit INT = PortA.2
#bit WAKE = PortA.3 |
Also, I would rename the pin numbers with a prefix of "MRF24J40_"
so there wouldn't be any conflict between data types like 'int' and the
name 'INT'. CCS is case-insensitive by default.
You have to be familiar with the function definitions in both compilers.
For example SPI1_Write() in MikroC is the same as spi_write() in CCS. Webpages like this one will help:
http://www.mikroe.com/support/index.php?/Knowledgebase/List/Index/7/mikroc
I just don't want to do the translation. Someone who is doing the project
needs to do it.
=================
Edit: Fixed a syntax error pointed out by bkamen.
Edit #2: Fixed a broken link.
Last edited by PCM programmer on Tue Dec 17, 2013 12:59 pm; edited 2 times in total |
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bkamen
Joined: 07 Jan 2004 Posts: 1615 Location: Central Illinois, USA
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Posted: Mon Mar 14, 2011 10:14 pm |
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PCM programmer wrote: |
#byte PortA = getenv("PORTA")
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Does that work?
I thought it needed to be
Code: | #byte PortA = getenv("sfr:PORTA")
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-Ben _________________ Dazed and confused? I don't think so. Just "plain lost" will do. :D |
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PCM programmer
Joined: 06 Sep 2003 Posts: 21708
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Posted: Mon Mar 14, 2011 10:19 pm |
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Yes, you are right. |
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alexbibi
Joined: 12 Mar 2011 Posts: 3
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MRF24J40MB module |
Posted: Sun Mar 27, 2011 4:31 pm |
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I noticed in the earlier post that instead of defining
Code: |
#byte PortA = getenv("sfr:PORTA")
#bit MRF24J40_CS = PortA.0
#bit MRF24J40_RST = PortA.1
#bit MRF24J40_INT = PortA.2
#bit MRF24J40_WAKE = PortA.3 |
he used
Code: |
#define CS PIN_C0
#define RST PIN_C2
#define INTN PIN_B0
#define WAKE PIN_C1
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Are they both acceptable???
is there a better one than the other???
thx _________________ Alex |
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bkamen
Joined: 07 Jan 2004 Posts: 1615 Location: Central Illinois, USA
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Re: MRF24J40MB module |
Posted: Sun Mar 27, 2011 4:37 pm |
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alexbibi wrote: | I noticed in the earlier post that instead of defining
#byte PortA = getenv("sfr:PORTA")
#bit MRF24J40_CS = PortA.0
#bit MRF24J40_RST = PortA.1
#bit MRF24J40_INT = PortA.2
#bit MRF24J40_WAKE = PortA.3
he used
#define CS PIN_C0
#define RST PIN_C2
#define INTN PIN_B0
#define WAKE PIN_C1
Are they both acceptable???
is there a better one than the other???
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Both will work.
When doing fancier bitfield manipulation, the top one is a little more portable -- depending on the situation.
Some might say it's more personal style than the other. (shrug)
-ben _________________ Dazed and confused? I don't think so. Just "plain lost" will do. :D |
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phongvm90
Joined: 31 Aug 2011 Posts: 1
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Posted: Wed Aug 31, 2011 10:54 am |
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Hi,
I am learning your code and currently, if I am not wrong, I've found some problems with it. I think you are setting the input output for SDI wrong.
This is your code:
#define SDI PIN_C5
#define SDO PIN_C4
This is the correct setting for 16f887:
#define SDI PIN_C4
#define SDO PIN_C5
I also don't think the get_tris_c(0x10) will work either, it set the SCK to be input. In this case, SCK should be output pin.
Hope this help.
EDIT: Sorry, now looking at your code, I can't find any fragment of code that use SDI and SDO, the compiler will do this by default so whatever of your setting is not matter. Hope you did not follow your setting when connecting the wires :D |
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picprogrammer
Joined: 10 Sep 2003 Posts: 35
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Posted: Sat Feb 16, 2013 11:39 am |
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Hi,
This topic is old but I did the same. The code from MikroC is easy to translate. I made a working code, it can send and receive 3 bytes. The IRQ edge for the received signal needs to be H to L. |
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Jerry I
Joined: 14 Sep 2003 Posts: 96 Location: Toronto, Ontario, Canada
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Posted: Sat Feb 16, 2013 6:45 pm |
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Hi picprogrammer
Are you going to share the code you ported to CCS.
Thanks |
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picprogrammer
Joined: 10 Sep 2003 Posts: 35
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Posted: Sun Feb 17, 2013 5:32 am |
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No problem! just uploaded it to the code Code Library |
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