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I2C multiplexed with ICSP on DSPIC30F4011

 
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Michael V



Joined: 10 Feb 2011
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I2C multiplexed with ICSP on DSPIC30F4011
PostPosted: Mon Feb 21, 2011 8:16 am     Reply with quote
This will be the first time I will be using a DSPIC and have to design it in to replace a PIC18F4580 which communicates via I2C as a MASTER to a slave PIC16F747.

Because I need the QEI interface on the DSPIC, I need to use this now. However, the SDA/SCL pair is multiplexed with the PGC/PGD on the DSPIC.

Will the two 4.7k pullups on each i2c bus line interfere with icsp programming, assuming the slave will leave the lines idle? I hate to have to use jumpers?
FvM



Joined: 27 Aug 2008
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PostPosted: Tue Feb 22, 2011 12:18 am     Reply with quote
The Microchip ICD2/REAL ICE etc. manuals give these corresponding guidelines:
Quote:
- No pull-ups on PGC/PGD - they will divide the voltage levels,
since these lines have 4.7KΩ pull-down resistors in the emulator.
- No capacitors on PGC/PGD - they will prevent fast
transitions on data and clock lines during programming and
debug communications.
- No capacitors on MCLR - they will prevent fast transitions of
VPP. A simple pull-up resistor is generally sufficient.
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