18f2550,crystal=4mhz,usb=48mhz,cpu=4mhz

[juandres]

The title exposes my problem, I need to work with these characteristics because of my application...

I test a program with these fuses:

[Ttelmah]

Change the XTPLL fuse to just XT.

Key to understand is that the PLL is always connected on the x550 chip. XTPLL, says take the _CPU_ clock from the PLL route - with the settings you have, this runs the CPU at 48MHz - Look at the oscillator diagram FIG 2-1 in the data sheet. On this, you see the clock feeding from the crystal directly into the CPUDIV divider, called 'XT, HS, EC, & ECIO'. These correspond to the CCS fuses for this direction, or being fed from the USB PLL, called 'HSPLL, ECPLL, XTPLL, and ECPLL' - you are selecting the latter.

However, unless your USB application is very tightly written, running the CPU at 4MHz, might be a problem, with it being much more likely to give USB faults. If you don't need great accuracy, consider clocking the CPU off the internal RC at 8MHz, or using XTPLL and CPUDIV4 to give 16MHz (remember the CPUDIV numbers are divisions on the 'non PLL' route, and binary pattern 11, gives /4 on the direct route, and /6 from the PLL....).
There is no fuse called XTPLL_XT (for fuses, look at the data sheet), This is a Microchip code for what in the data sheet, is just called 'XT' - CCS use the same nomenclature.

Best Wishes