How many times can 16F877A EEPROM be written

[zilot]

In data sheet stands for EEPROM

Endurance 100K at 25C and 5V. Units are E/W (suppose erase, write), does it mean that in program that chip executes in its life you can call 100 000 times instruction for writing same EEPROM location, or you can access whole EEPROM in that number of times (doesn't matter which location you use for writing). So if one want to elongate time of storing single variable in EEPROM he must change its location after 100K times, true or not?

[PCM programmer]

[Ttelmah]

There are a couple of extra 'caveats', which may be worth considering if looking for high reliability. It might be worth avoiding the first, and the last EEPROM cell. In the past on a couple of other processors, warnings have existed, that in the event of certain 'brownout' events, the registers holding the address, can get reset, while the write still continues. Depending on whether they reset to '1', or '0', this can potentially overwrite these end cells.
Seperately, it is well worth using a read, to verify what the cell contents 'are', before writing. Writing the same data, uses a 'life', and avoiding this takes very little time indeed.
It is also worth considering whether you really have to write at all. I have a number of systems, some of which have been running continuously now for years, using the older EEPROM variants, with shorter lives. On these, data is updating at short intervals, yet the write life has not yet even been approached on any of the systems. The reason is that they don't write the data to EEPROM, till the main unregulated incoming supply rails drops below a critical voltage. On most of these systems, half a dozen writes a year, would be quite typical. It is relatively easy to calculate how long a capacitor will maintain sufficient voltage for the regulated rail to be maintained. One system for example, is a sheet counter, on the paper rolls used to feed printing presses in newspaper systems. The count rate, can be thousands a minute, and the system must maintain count, so long as power is available, and carry on when power is restored.

Best Wishes

[zilot]

Thank you both

[Ttelmah]

It depends on your supply. These systems, have an unregulated 24v supply (part of an industrial system), which is regulated to feed the PIC. The supply is fed in via a low voltage drop diode, so that when the 24v 'falls', other equipment on the bus does not start loading the capacitor on the PIC supply. Then there is the capacitor, and a LDO regulator. The regulator can maintain 5v, down to 5.6v in. The original systems had a power supply supervisory IC, which gave a switched output when the capacitor voltage fell below 18v. On other similar systems, I have used things as simple as a TL431, to monitor the supply. The capacitor can be suprisingly small in fact. Writes take typically 4mSec each, and if you have 10 bytes to write, this only requires supply maintenance for 40msec after detection. If the PIC turns off it's peripherals straight away, the current is normally only a few mA (depends on clock rate). for 20mA (say - remember to include the consumption of the regulator), with detection 3v above the drop out voltage, you only need:

(0.02*0.04)/3 Farads

This works out as just under 270uF. I used 470uF (you must remember that most electrolytics have something like a 20% tolerance...).
The write, after completion, sits and waits for a while, and then if the supply goes back above the threshold, restarts the code cleanly.
For something as infrequent as a few times a day, there is no point. The counts on these were updating hundreds or thousands of times a minute...

Best Wishes

[zilot]

Thank you Ttelmah for useful hints. I understood eveything, will bear in mind for future projects.

regards