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gael
Joined: 08 Jan 2005 Posts: 7
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Timer 0 Interrupt problem |
Posted: Mon Feb 06, 2006 1:59 pm |
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I am interfacing two wheel watchers / wheel encoders on a little robot.
First, I was using a PIC18F452 and everything was working fine. My application needed a little bit more ROM, so I decided to switch to a PIC18F4620.
The Right wheel watcher is connected to T0CLK and the left WW is connected to T1CLK. The following code was used on the 18F452 to count the number of pulses that each WW produces:
Code: |
// ---- Init timer 0 and 1 for interfacing with the two wheel watchers
void init_wheel_watchers()
{
// right ww interface
setup_timer_0(RTCC_EXT_H_TO_L | RTCC_DIV_1);
set_timer0(65535);
enable_interrupts(INT_TIMER0);
// left ww interface
setup_timer_1(T1_EXTERNAL | T1_DIV_BY_1);
set_timer1(65535);
enable_interrupts(INT_TIMER1);
// init wheel watchers variables
reset_ww_clks();
}
// ---- Timer 0 isr for the right ww
#INT_TIMER0
void right_ww_isr()
{
right_ww_clks++;
set_timer0(65535); // to cause an interrupt upon next tick
}
// ---- Timer 1 isr for the left ww
#INT_TIMER1
void left_ww_isr()
{
left_ww_clks++;
set_timer1(65535); // to cause an interrupt upon next tick
}
// ---- reset the counts
void reset_ww_clks()
{
left_ww_clks = 0;
right_ww_clks = 0;
}
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Since I switched to the PIC18F4620, it appears that the count for the right wheelwatcher is always half what it should be.
I don't understand this, because everything stayed the same (the way the timers are setup).
I am missing some thing in the way I setup Timer 0? |
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rwyoung
Joined: 12 Nov 2003 Posts: 563 Location: Lawrence, KS USA
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Posted: Tue Feb 07, 2006 1:46 pm |
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1) Get data sheet for '452 and '4620. Specifically the seciton on the counter/timers. Check the configuration register bit assignments for both.
2) Look at a LST file for your '452 code and make note of what the compiler is writing into the configuration registers.
3) Look at a LST file for your '4620 code and make note of what the compiler is writing into the configuration registers.
It is not unheard of for the CCS compiler to have funny little differences that cause code that used to work on one chip fail on another closely related chip. This may be your problem. _________________ Rob Young
The Screw-Up Fairy may just visit you but he has crashed on my couch for the last month! |
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gael
Joined: 08 Jan 2005 Posts: 7
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Posted: Sun Feb 12, 2006 3:40 pm |
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rwyoung wrote: | 1) Get data sheet for '452 and '4620. Specifically the seciton on the counter/timers. Check the configuration register bit assignments for both.
2) Look at a LST file for your '452 code and make note of what the compiler is writing into the configuration registers.
3) Look at a LST file for your '4620 code and make note of what the compiler is writing into the configuration registers.
It is not unheard of for the CCS compiler to have funny little differences that cause code that used to work on one chip fail on another closely related chip. This may be your problem. |
I did all of that, and both MCUs have the same T0CON and T1CON register bit assignments.
I looked at the code CCS is generating, and it is the same for the two chips.
I did a little more experiments with the problem I am having and here is a better description:
- Some Timer 0 interrupts are not being caught, so my right_ww_clks counts are always a lot less that what they should be.
- It also appears that Timer 1 interrupts are being thrown more that they should, so my left_ww_clks count is higher that what I have with a '452' device.
I looked at the errata sheet for the '4620', as well as the errata sheet for Timer 1. It appears that what I am having is a silicon bug.
With a '452', everything works perfectly. What is the closest chip to '452' with 64K of ROM? I figured I should try another device and see if the same silicon bug is still there. |
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Ttelmah Guest
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Posted: Sun Feb 12, 2006 4:01 pm |
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To be slightly lateral though, why not use the hardware CTCs. I didn't 'like' your original code, since you are effectively, using two timers, just as external interrupts. Not counting with them at all, but just interrupting on the first change. This will limit the maximum frequency massively. Entering an interrupt on a PIC18, implies executing about 30 instructions, to save various registers. With your code in the 'handler', and the other code needed to tidy up on exit, you limit the maximum supported frequency to perhaps 50000 counts per second, and this assuming the other source is not triggering at the same time. You should also remember here, that the interrupt handler that is defined first, has the higher priority, and will pre-empt handling of the other source.
Now you could improve things a little, by taking the low byte of the timer value in the interrupts, and adding this+1 to the 'clks' counter. This will allow double pulses to successfully be counted.
However far better to use the hardware CTCs. With these you can count in excess of 20MHz. Use a regular timer interrupt to drive the code that has to execute when the counts have changed. The 4620, has a couple of extra registers that may need saving, and this may be what is causing the difference, however if so, it implies you are very borderline, even on the older chip...
Best Wishes |
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gael
Joined: 08 Jan 2005 Posts: 7
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Posted: Sun Feb 12, 2006 5:30 pm |
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Ttelmah wrote: | hardware CTCs |
Do you mean CCPs?
If so, I am already using them to drive two servos. |
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