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jds-pic
Joined: 17 Sep 2003
Posts: 205
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| SSP / i2c interrupt handling, slave mode... |
 Posted: Mon Nov 14, 2005 11:02 am |
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preface: PIC is in i2c slave mode.
from reading the SSP docs, an INT_SSP is generated when SSP_BUF has been loaded with a byte from the i2c master. (i also see that it's quasi-double buffered due to the SSP_SR also holding an incoming byte)
ergo, SSP_BUF is a single byte buffer.
given the following code snippet, based on CCS's EX_SLAVE.C with a hardware-based i2c TX tweak (thanks Ttelmah)...
| Code: |
#BYTE SSPBUFF=0xFC9
#BYTE SSPCON1=0xFC6
#bit SBIT=SSPCON1.4
#INT_SSP
void i2c_ssp_interrupt() {
int incoming, state;
state = i2c_isr_state();
if(state < 0x80) { // master is sending data
incoming = i2c_read();
if(state == 1) // first received byte is address
eeprom_address = incoming;
if((state == 2) && (eeprom_address < (SIZEOF_VIRTUAL_EEPROM))) // second received byte is data
eeprom_buffer[eeprom_address] = incoming;
}
if (state == 0x80) { // master is requesting data
SSPBUFF=(eeprom_buffer[eeprom_address]); // address is global
SBIT=1; // hardware based i2c write.
}
} |
how is state ever 2? where is the second byte held such that there are two bytes available when the interrupt is called?
sorry if i am missing something basic here. i am thinking that there must be some trick to i2c_isr_state() w.r.t. a given i2c transaction. when is the "byte counter" set back to 0 -- when the final i2c stop condition is encountered?
thanks
jim / jds-pic |
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Ttelmah
Guest
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| Posted: Mon Nov 14, 2005 11:31 am |
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I2C_STATE, contains a static counter, which is reset to '0', when a start condition is received. It has the contents of the R/W flag,then 'ored' into the top bit, from the address byte, and is incremented for each byte clocked.
Best Wishes |
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jds-pic
Joined: 17 Sep 2003
Posts: 205
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| Posted: Mon Nov 14, 2005 12:57 pm |
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| Ttelmah wrote: | | I2C_STATE, contains a static counter, which is reset to '0', when a start condition is received. It has the contents of the R/W flag,then 'ored' into the top bit, from the address byte, and is incremented for each byte clocked. |
Ttelmah,
thanks, that clarifies it perfectly.
jim / jds-pic |
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