Author |
Message |
Topic: Linking of files in MPLAB is not working |
epalite
Replies: 1
Views: 5873
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Forum: General CCS C Discussion Posted: Wed Mar 04, 2015 9:17 pm Subject: Include Path problem |
Hi,
Observed similar problem with MPLAB 8.92 with PCH v5.016/v5.036 as well as PCM. Believe the problem exist in PCM/PCH v4.
Apparently if you duplicated multiple version of same project, e.g. w ... |
Topic: Compiler V5.0 --> not enough RAM |
epalite
Replies: 11
Views: 17939
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Forum: General CCS C Discussion Posted: Tue Dec 03, 2013 3:02 am Subject: Compiler V5.0 --> not enough RAM |
Hi all,
the v5 (v5.015/016) uses significantly more ROM space. So, what special does it do compared with v4? Anyone can shed the light?
Thanks! |
Topic: FUSES HSM and external crystal on 66k80 |
epalite
Replies: 2
Views: 5907
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Forum: General CCS C Discussion Posted: Thu Dec 13, 2012 11:50 pm Subject: FUSES HSM and external crystal on 66k80 |
Thanks!
I found that in order for me to use RC0/1 as IO, I need to add SOSC_DIG to the FUSES statement, otherwise, RC0/1 might be redefined (see data sheet "If a secondary oscillator is not de ... |
Topic: FUSES HSM and external crystal on 66k80 |
epalite
Replies: 2
Views: 5907
|
Forum: General CCS C Discussion Posted: Thu Dec 13, 2012 8:48 am Subject: FUSES HSM and external crystal on 66k80 |
Hi,
I am trying to get a 16MHz from an external 4MHz crystal with 4x PLL, however, I seem to be having internal OSC to be driving instead. I read in this forum about the internal OSC will switch ov ... |
Topic: PIC16F690 and I2c master |
epalite
Replies: 7
Views: 19423
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Forum: General CCS C Discussion Posted: Wed Sep 07, 2011 10:29 pm Subject: PIC16F690 and I2c master |
#use i2c(master, sda=PIN_B4, scl=PIN_B6,force_sw)
does it enough for PIC16F690 software I2c bus?
The software stay in loop in routine ext_eeprom_ready(). It seems there's no ack from ... |
Topic: setup_adc_ports generates incorrect assembly codes |
epalite
Replies: 1
Views: 5025
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Forum: General CCS C Discussion Posted: Tue Apr 20, 2010 3:15 am Subject: setup_adc_ports generates incorrect assembly codes |
Hi,
setup_adc_ports generates following incorrect assemblies, on target 16F1827.
Compiler version "CCS PCM C Compiler, Version 4.104, 51616"
1. There are no registers at BANK 3 0x10 ... |
Topic: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
epalite
Replies: 6
Views: 10164
|
Forum: General CCS C Discussion Posted: Tue Jun 30, 2009 1:32 am Subject: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
Hi,
I rewrote and emulated i2c_isr_state(), except to retrieve RW from SSPCON.RW instead of SSPBUF.0. It didn't work on 16F690, 16F916, 16F887 M/SSP slave.
It seems RW flag has not been set on S ... |
Topic: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
epalite
Replies: 6
Views: 10164
|
Forum: General CCS C Discussion Posted: Mon Jun 29, 2009 11:57 pm Subject: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
Hi PCM Programmer,
I read your explanation.
My question is why doesn't the i2c_isr_state() function extract the R/W flag from SSPCON.RW (0x94 bit 2)?
Doesn't the SSPCON.RW carry the ADDR R/W ... |
Topic: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
epalite
Replies: 6
Views: 10164
|
Forum: General CCS C Discussion Posted: Mon Jun 29, 2009 10:49 pm Subject: Why i2c_isr_state() testing SSPBUF.0 instead of SSPCON.RW |
Hi,
The disassembly of i2c_isr_state() reveals that it reads SSPBUF.0 to determine if the ADDR is for read or write, instead of probing SSPCON RW flag. Why is that so?
The Microchip AN734 shown ... |
Topic: I2C slow always fast |
epalite
Replies: 8
Views: 9836
|
Forum: General CCS C Discussion Posted: Thu Jun 25, 2009 2:55 am Subject: I2C slow always fast |
Then with V4, the option to specify the rate was added. Slow and fast, then basically behave the same, if the same rate is selected,...
Hi, didn't quite understand this "V4" option. Do yo ... |
Topic: I2C slow always fast |
epalite
Replies: 8
Views: 9836
|
Forum: General CCS C Discussion Posted: Thu Jun 25, 2009 12:53 am Subject: I2C slow always fast |
#use I2C(master, sda=PIN_c4, scl=PIN_c3,slow=25000)
Hi, exactly how does the "SLOW" and "FAST" affect the SCL? And when do we use each of them? |
Topic: Extra binary line generated from CCS PCM |
epalite
Replies: 4
Views: 5868
|
Forum: General CCS C Discussion Posted: Wed Apr 08, 2009 7:34 pm Subject: Extra binary line generated from CCS PCM |
Just do this and you'll get correct ASM code:
set_tris_a(PORTA_MASK);
My intent was to set only specific bit but not others. I found the work arounds, and list the result of various meth ... |
Topic: How to keep compiler from using RAM 0x70 through 0x7f |
epalite
Replies: 3
Views: 3959
|
Forum: General CCS C Discussion Posted: Wed Apr 08, 2009 7:28 pm Subject: How to keep compiler from using RAM 0x70 through 0x7f |
Hi,
Tried your suggestion.
It works on F690, however, it doesn't work on F887. Here is the error and the source code for F887:
*** Error 103 "main.c" Line 6(2,6): Constant out of th ... |
Topic: How to keep compiler from using RAM 0x70 through 0x7f |
epalite
Replies: 3
Views: 3959
|
Forum: General CCS C Discussion Posted: Wed Apr 08, 2009 3:45 am Subject: How to keep compiler from using RAM 0x70 through 0x7f |
Hi,
I am keeping these ram locations for cross page access without having to flipping pages.
On CCS PCM C Compiler (Version 4.073) with F690, the compiler does not seem to use the location.
H ... |
Topic: Extra binary line generated from CCS PCM |
epalite
Replies: 4
Views: 5868
|
Forum: General CCS C Discussion Posted: Wed Apr 08, 2009 1:04 am Subject: Extra binary line generated from CCS PCM |
Here you go, the source,
#include <16F690.h>
#define PORTA_MASK 0x01
#byte TRISA = 0x85
void main() {
set_tris_a(TRISA | PORTA_MASK);
}
and the c ... |
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