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| Author | Message |
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 Topic: Parallel Master Port (PMP) communication with PIC18F67J50 |
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| cassis Replies: 1 Views: 3537 |
 Forum: General CCS C Discussion Posted: Thu Oct 14, 2010 4:44 pm Subject: Parallel Master Port (PMP) communication with PIC18F67J50 |
| This is my assebly programm for PMP module.
The PMDIN1L Reg is in the subroutine, but there isn't bus activity for write on the board. All PMP port pins (PMA 8 - 13, PMD 0- 7, PMCS1, PMCS2, PMWR, ... |
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